Instant SAS: computationally efficient synthetic aperture SONAR

Type: Master's Assignment
Contacts: Koen Blom, André Kokkeler and Guus Beckers
Location: CAES, University of Twente

Oceans and seas are more and more exploited by humans, bringing along an increasing need for building and construction in maritime environments. In order to enable such activities some sort of vision is needed to create awareness of the environment. Vision under water can be realized by optical and acoustical systems. In this study we focus on the use of acoustics for vision, which is generally known as SONAR imaging.


Modern high-frequency SONARs are capable of producing high-quality images of the sea bottom. As long as objects of interest lay proud on the sea bottom this imaging technology works well. In many occasions, however, the undersea conditions are less favorable and objects may have sunken into the sediment. This is particularly a problem if these objects are, e.g., explosives that may be dangerous for fishery or sub-sea construction. Since high-frequency SONAR does not penetrate into the bottom, such objects are invisible for this type of sonar. Fortunately, low-frequency sound is capable of penetrating into the bottom and therefore capable of detecting sunken objects.

TNO has developed a wideband low-frequency synthetic aperture SONAR to exploit the useful properties of low-frequency underwater sound. This type of SONAR allows the user to create images of the inside of the sea bottom. The computational burden of low-frequency wideband synthetic aperture imaging technology is high, because all movements of the SONAR have to be taken into account during the imaging process. Consequently, the imaging process takes a long time. In order to create an immediate situational awareness, there is a need to dramatically improve the computational speed of this type of synthetic aperture SONAR processing.


The purpose of this assignment is to investigate methodologies and computer architectures to implement (near) real-time high-quality synthetic aperture SONAR processing. The assignment consists of:

  • Build an understanding of the low-frequency synthetic aperture SONAR imaging process
  • Study currently used algorithms for high-quality imaging
  • Study computer architectures for (near) real-time image processing
  • Develop system-level designs for potential (near) real-time SONAR processing and make a trade-off of between the designs
  • Design and implement the most viable approach
  • Establish a metric for benchmarking the high-speed implementation with currently used techniques
  • Conduct an evaluation of the achievements


Hierarchical Run Time Mapping (Hierarchical RTM)

Type: Master's Assignment
Contacts: André Kokkeler
Location: CAES, University of Twente



Within the STARS project, reconfigurability has been introduced in large scale systems for safety and security. (e.g. radars). To exploit reconfigurability of hardware at run-time, the Run Time Mapping (RTM) concept has been introduced.

RTM assigns tasks to processing elements and allocates the necessary communication capacity. The major difference with a multi-core operating system is that performance with respect to e.g. throughput and latency has to be guaranteed. RTM has been elaborated for Multi-Processor Systems-on-Chip (MP-SoCs) based on Domain Specific Reconfigurable Cores (DSRCs). For large scale systems for safety and security, the MP-SoCs in combination with RTM, are the basic building blocks where a large computational capacity is realized through a hierarchy of processing elements. Multiple MP-SoCs are placed on a Printed Circuit Board (PCB), multiple PCBs are placed in a rack etc.
Besides MP-SoCs, large scale systems also consist of other types of processing elements like e.g. FPGAs, GPPs and GPUs. Currently, these processing elements are controlled via ‘standard’ operating systems and therefore performance guarantees can hardly be given. From a system level, these devices are considered to deliver services and the software framework managing requests and delivery of services is ‘Service Oriented’.
Based on the above, the research questions that will be addressed in this MSc. assignment are:

  • How can the RTM concept be extended from MP SoC to a hierarchical system which also contains FPGAs, GPUs and GPPs?
  • How can the RTM concept be integrated in a Service oriented framework?


The assignment will consist of the following tasks:

  • Study on Run Time Mapping (RTM)
  • Study on extending the RTM concept to FPGA, GPU and GPP
  • Generalization of RTM within a hierarchical architecture
  • Integration of RTM within a Service Oriented framework
  • Concept demonstration

Employing the WaveCore platform for underwater acoustic communications

Type: Master's Assignment
Contacts: Koen Blom
Location: CAES, University of Twente

Over 70% of Earth’s surface is covered by water. Large parts of this immense water mass are still unexplored. Underwater networks would vastly improve man’s ability to explore and exploit remote aquatic environments. As of today, due to the fast attenuation of light and radio waves in water, communication under water is mainly based on acoustic pressure waves to convey information.

The underwater acoustic communication channel is exceptionally challenging. Digital Signal Processing (DSP) techniques can be employed to compensate for the distortion caused by the underwater acoustic channel. In this assignment a novel programming methodology for implementation of underwater DSP is studied, the WaveCore platform [1]. WaveCore DSP technology is specifically developed for physical modeling of audio/acoustical phenomena. The technology has shown to be efficient in the field of stompbox-style guitar effects.


The purpose of this assignment is to evaluate the WaveCore methodology for implementation of acoustic signal processing in underwater modems. Typical operations that need to be implemented are blind adaptive equalizers, matched filter banks, etc. [2].

The assignment consists of:

  • Mapping various DSP methods for underwater communications to FPGA using the WaveCore methodology.

  • Studying the mapped algorithms in terms of FPGA resource efficiency, power and memory footprint. For example, a comparison of manually written VHDL versus WaveCore implementations would be of great interest.

  • Comparing design effort: WaveCore design methodology versus VHDL design methodology.

  • Suggestions for improving the WaveCore platform.


Math Verstraelen, Koen Blom en André Kokkeler




Compiler for automatic DLP extraction

Type: Master's Assignment
Contacts: Marco Bekooij
Location: CAES, University of Twente

Software defined radio applications are for performance reasons executed on multiprocessor systems. These applications must be partitioned into smaller tasks before they can be executed in parallel. This time-consuming partitioning process is often done manually.

To ease the development of parallel embedded stream-processing software, PhD students of the University Twente are working together with NXP developing a multiprocessor compiler. This compiler takes as input a C-like sequential program of the application and transforms it into a parallel task graph. A shortcoming of this compiler is that data-level parallelism is not extracted because at most one task is  created for each function in the sequential program.

The objective of this graduation project is to extend this multiprocessor compiler such that data-level parallelism can be extracted. The amount of data-level parallelism should be sufficient to meet the real-time requirements of the application.


Free Joomla Templates designed by Web Hosting Top