Efficient architectures and tools for streaming applications

In the past five years the group has been working with this theme on energy-efficient MPSoC (Multi-Processor System on Chip) architectures and tools for streaming applications such as: phased array antenna systems, medical image processing, software defined radio and sensor networks.

For this domain an energy-efficient coarse-grain reconfigurable core called the Montium was developed and an efficient NoC (Network on Chip) supporting best-effort as well as guaranteed throughput traffic (Wolkotte and Kavaldjiev). The interface between the core and the NoC was developed by van de Burgwal. All these designs were integrated and verified in the Annabelle test-chip (2008) for the FP6 4S project for decoding of DRM (Digital Radio Mondial) signals and later in the CRISP RFD (Reconfigurable Fabric Die) test chip (2010). On the application side we worked on Software Defined Radio (Rauwerda), Cognitive Radio (Zhang) and digital beamforming (van de Burgwal, Rovers). In this reporting period we were one of the first in experimenting with run-time resource allocation, i.e. performing the mapping of tasks to cores at run-time instead of at design-time. This innovative work received quite some attention in the professional community (e.g. Hölzenspies received a best paper award for this work). The work on tools for modelling and analysis of streaming applications based on variants of SDF graphs (e.g. VPDF and VRDF) by Wiggers has resulted in wider applicability of SDF graphs.

The internationally recognised trends for the coming years in computer architecture are

  1. increasing parallelism on a chip
  2. increasing pressure on energy consumption and
  3. increasing complexity and adaptivity of applications (see for example cover article IEEE Computer Feb. 2011).

We address all these trends in our research with a focus on streaming applications. In current projects like STARS (FES 4 PhDs), NEST (STW 5 PhDs), EASY (NWO 1 PhD), Modern (NWO 1 PhD), ADVANCE and S(o)OS (FP7 projects 2 PhDs) we work on energy-efficient multi-core architectures, run-time resource allocation and tools for modelling and parallelisation of streaming applications. In the SeaSTAR (1 PhD), CMOS Beamforming (1 PhD), TSP (1 PhD), ADREM (1 PhD in co-operation with ICD) and ALWEN (1 PhD with ICD and SRR) projects we address energy-efficient digital processing of increasingly complex wireless communication algorithms. Energy consumption is also becoming a concern for the high performance embedded computing domain. However, heterogeneous MPSoCs are rarely applied in this domain despite their superior power-efficiency, due to the excessive programming effort that these systems require. Therefore, an important research direction is the development of new abstractions and models that can be applied in programming tools to ease the software development for these systems without compromising performance and energy-efficiency. It is likely that useful abstractions can only be created if additional constraints are imposed on the applied software programming models and hardware architectures. In this context we have high expectations of our work on the composability of (real-time) components of PhDs Hausmans and Geuns. Furthermore, we are developing a tool called CλaSH that can generate hardware (VHDL) from a high-level functional (mathematical) specification. The initial results (demonstrated at DATE11) are very encouraging.

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