Dependable embedded systems

The research in dependable systems, including mixed-signal IPs and sensors, is focused on the design and implementation of SoC architectures and IPs for dependable embedded systems.The key research challenge is to foster dependability (i.e. availability, reliability, safety and maintainability) as embedded systems are often business - or safety critical in many applications.

In this period we worked on testing mixed signal systems using on-chip digital processing (Sheng). The work in this theme has gradually moved from pure mixed-signal off-line testing (after production) to on-line testing and fault-repair in an operational system e.g. in the FP7 CRISP project and the STARS project. Also work has started on aging in the TOETS project.

Based on the knowledge on testing of SoCs, the group continues to extend its knowledge to dependability issues in the next 5 years. Besides fault-diagnosis and test this also includes on-line repair and hence also design issues. It will span digital as well as mixed-signal components and sensors (heterogeneous systems / SoCs). There will be a focus on challenging applications in terms of dependability, meaning harsh environments (e.g. temperature), small energy footprint and very high dependability requirements (e.g. safety) at relatively low costs. The automotive domain is a good example where e.g. NXP has large interests. The defence domain is another example where Thales has interests. The new activity in the STARS project (2011, PhD: Y. Zhao), dealing with on- chip lifetime prediction on an embedded processor and counteraction in a multi-core SoC is a good example of this. Recently the Catrene “TOETS” project has started with 3 PhDs. Two are involved in the dependable analog/mixed-signal design at circuit level (Wan) and system level (Khan) for automotive applications. The third PhD investigates the use of the Xentium processor (designed by spin-off company Recore Systems) for automotive and space applications (Rohani), especially to make it robust against dynamic faults like transient upsets.

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